Dielectric extension to mitigate short channel effects

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United States of America Patent

PATENT NO 9318333
SERIAL NO

11724725

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Abstract

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In patterning a transistor, some of a layer of gate dielectric material is allowed to remain over a semiconductor substrate upon which the transistor is formed. This remaining dielectric material retards the implantation of dopants into the underlying substrate, effectively lengthening a channel region of the transistor. This mitigates unwanted short channel effects, such as leakage currents, for example, and thus mitigates yield loss by establishing a transistor that performs in a more predictable or otherwise desirable manner.

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Patent Owner(s)

  • CYPRESS SEMICONDUCTOR CORPORATION;GLOBALFOUNDRIES INC.;SPANSION LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gopal, Vidyut Saratoga, US 47 1316
Jones, Phillip L Fremont, US 7 73
Sinha, Shankar Redwood Shores, US 26 115
Yang, Jean Yee-Mei Glendale, US 25 428

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