Wafer backside particle mitigation
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United States of America Patent
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Apr 19, 2016
Grant Date -
Feb 18, 2016
app pub date -
Aug 14, 2014
filing date -
Aug 14, 2014
priority date (Note) -
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Abstract
A method of particle mitigation which includes obtaining a semiconductor wafer having a nonfunctional backside and a functional frontside on which semiconductor devices are formed by one or more lithography processes; coating the backside with a layer comprising silicon or amorphous carbon; planarizing the coated backside by a planarizing process; placing the semiconductor wafer onto a wafer chuck such that the wafer chuck makes direct contact with the coated backside; and while maintaining the coated backside in direct contact with the wafer chuck, performing a first lithographic process on the frontside.
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