Self-limited crack etch to prevent device shorting

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United States of America Patent

PATENT NO 9318692
SERIAL NO

14629659

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Abstract

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A semiconductor device includes a piezoelectric layer interposed between a first metal layer and a hardmask layer. A first trench extends through the hardmask layer, the piezoelectric layer and the first metal layer. A self-limiting second trench extends through the hardmask layer and the piezoelectric layer without reaching the first metal layer.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bryce, Brian A Chevy Chase, US 10 25
Chang, Josephine B Bedford Hills, US 263 5090
Miyazoe, Hiroyuki White Plains, US 103 889

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