Frequency response compensation in a digital to analog converter
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United States of America Patent
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Apr 19, 2016
Grant Date -
Jan 21, 2016
app pub date -
Jul 17, 2014
filing date -
Jul 17, 2014
priority date (Note) -
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Abstract
A digital-analog converter (DAC) comprises a receiving circuit configured to receive an input bit stream and generate a first bit signal stream of the input bit stream, a first delay circuit coupled to the receiving circuit to receive the first bit signal stream and to generate a second bit signal stream representing a delayed version of the first bit signal stream. The DAC also comprises a first current generation circuit to receive the first bit signal stream, the first current generation circuit configured to provide first current, corresponding to the first bit signal stream, to a first output. The DAC further comprises a second current generation circuit to receive the second bit signal stream and to provide second current to the first output responsive to receiving the second bit signal stream, a waveform of the second current inverted and scaled relative to a waveform of the first current.
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