Active biasing in metal oxide semiconductor (MOS) differential pairs
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United States of America Patent
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Apr 26, 2016
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N/A
app pub date -
Mar 10, 2014
filing date -
May 12, 2004
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Abstract
Apparatus and methods advantageously maintain transistors of open-drain differential pairs biased in the saturation region when “active,” rather in than the triode or linear region. The biasing techniques are effective over a broad range of process, voltage, and temperature (PVT) variations. By controlling a high voltage level used to drive the gate of a transistor of the differential pair, the biasing of the transistor in the saturation region is maintained. In one embodiment, the low voltage level used to cut off the transistor of the differential pair is also controlled. These techniques advantageously permit differential drivers to exhibit relatively large output swings, relatively high edge rates, relatively high return loss, and relatively good efficiency.
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