Information processing apparatus, memory control apparatus, and control method thereof
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United States of America Patent
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May 3, 2016
Grant Date -
Feb 13, 2014
app pub date -
Jul 26, 2013
filing date -
Aug 8, 2012
priority date (Note) -
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Abstract
A memory control circuit is configured to take a priority for each transfer instruction into account but not the priority in a memory access unit, and thus processing of a high-priority transfer instruction received during a memory access needs to wait for a long time. The memory control apparatus divides the received transfer instruction into a memory access unit and, when the transfer instruction having a higher priority is received during the memory access, the memory access based on a low-priority transfer instruction is interrupted and starts the memory access based on the high-priority transfer instruction.
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