Automated hybrid metrology for semiconductor device fabrication

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United States of America Patent

PATENT NO 9330985
SERIAL NO

13419286

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Abstract

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Methods and systems are provided for fabricating and measuring features of a semiconductor device structure. An exemplary method of fabricating a semiconductor device structure involves fabricating a feature of the semiconductor device structure on a wafer of semiconductor material, determining a hybrid recipe for measuring the feature, configuring a plurality of metrology tools to implement the hybrid recipe, and obtaining a hybrid measurement of the feature in accordance with the hybrid recipe.

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Patent Owner(s)

Patent OwnerAddress
GLOBALFOUNDRIES U S INC400 STONEBREAK ROAD EXTENSION MALTA NY 12020

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Rana, Narender N Highland, US 1 13
Saleh, Ned R Santa Clara, US 2 20
Sendelbach, Matthew J Fishkill, US 13 125
Vaid, Alok Ballston Lake, US 30 105

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