Transistor device with gate bottom isolation and method of making thereof
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United States of America Patent
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May 3, 2016
Grant Date -
Oct 1, 2015
app pub date -
Mar 25, 2014
filing date -
Mar 25, 2014
priority date (Note) -
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Abstract
An embodiment relates to a transistor device including a pillar of semiconductor material extending vertically from a bottom portion in contact with an electrically conductive contact line, where the electrically conductive contact line extends laterally past the pillar in a horizontal direction, a gate insulating liner layer on a lateral side of the pillar, a gate electrode on the gate insulating layer extending along the lateral side of the pillar, and a region of electrically insulating semiconductor oxide material filling a space between a bottom portion of the gate electrode and a top portion of the electrically conductive contact line.
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