Flip chip bump array with superior signal performance

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United States of America Patent

PATENT NO 9332629
APP PUB NO 20120104596A1
SERIAL NO

12938196

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Abstract

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An integrated circuit (342) that is electrically connected to a printed circuit board (246) with a package substrate (344) includes a circuit body (352), and a bump array (354) that electrically connects the circuit body (352) to the package substrate (244). The bump array (354) includes a first bump set (356) having a plurality of signal bumps (364) and a plurality of non-signal bumps (366) alternatingly interspersed and aligned along an axis. With the present design, the bump array (354) allows each signal bump (364) to be surrounded by a power bump (370) and a ground bump (368). The package substrate (344) includes (i) a package body (372); and (ii) a pin array (374) that includes a first pin set (376) that includes a plurality of signal pins (384) and a plurality of non-signal pins (386) alternatingly interspersed and aligned along an axis.

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Patent Owner(s)

  • INTEGRATED DEVICE TECHNOLOGY, INC.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shah, Jitesh Fremont, US 14 79

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