Apparatus for time domain offset cancellation to improve sensing margin resistive memories

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United States of America Patent

PATENT NO 9336873
APP PUB NO 20150155036A1
SERIAL NO

14094488

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Abstract

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Described are apparatuses for time domain offset cancellation. One example of the apparatus includes: a variable resistance memory cell; a reference resistive memory cell; a detector to generate an output indicating timing relationship between a pulse arriving from the variable resistance memory cell and a pulse arriving from the reference resistive memory cell; and a logic unit to receive the output from the detector and to generate a control signal to the adjust timing relationship as indicated by the detector.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
August, Nathaniel J Portland, US 8 48
Wei, Liqiong Portland, US 19 156

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