Memory channel that supports near memory and far memory access
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United States of America Patent
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May 17, 2016
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app pub date -
Sep 30, 2011
filing date -
Sep 30, 2011
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Abstract
A semiconductor chip comprising memory controller circuitry having interface circuitry to couple to a memory channel. The memory controller includes first logic circuitry to implement a first memory channel protocol on the memory channel. The first memory channel protocol is specific to a first volatile system memory technology. The interface also includes second logic circuitry to implement a second memory channel protocol on the memory channel. The second memory channel protocol is specific to a second non volatile system memory technology. The second memory channel protocol is a transactional protocol.
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