Electronic circuit for fitting a virtual address range to a physical memory containing faulty address

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United States of America Patent

PATENT NO 9343185
APP PUB NO 20150089329A1
SERIAL NO

14037487

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Abstract

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A memory having variable size blocks of failed memory addresses is connected to a TCAM storing data values of ranges of addresses in the memory. The ranges of addresses correspond to virtual addresses that, in combination with an offset, point away from failed memory addresses. A reduction circuit connected to the TCAM produces an output for each programmed range of addresses based on a virtual address. A priority encoder, connected to the reduction circuit, selects a first range from the reduction circuit and passes the first range to a random-access memory (RAM). Responsive to the virtual address bring an address in one of the ranges of addresses, the priority encoder passes the first range containing the virtual address to the RAM, which passes a corresponding offset value to the Adder based on the first range. The Adder calculates a physical memory address directing the virtual address to a functional memory location.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barth,, Jr John E Williston, US 64 372
Chellappa, Srivatsan Tempe, US 15 146
Lewis, Dean L Williston, US 5 14

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