Memory controlled operations under dynamic relocation of storage

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United States of America Patent

PATENT NO 9348524
APP PUB NO 20160139830A1
SERIAL NO

14547639

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Abstract

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A computing device is provided and includes a plurality of nodes. Each node includes multiple chips and a node controller at which the multiple chips are assignable to logical partitions. Each of the multiple chips includes processors and a memory unit configured to handle local memory operations originating from the processors. The node controller includes a dynamic memory relocation (DMR) mechanism configured to move data having a DMR storage increment address relative to a local one of the memory units without interrupting a processing of the data by at least one of the logical partitions. During movement of the data by the DMR mechanism, the memory units are disabled from handling the local memory operations matching the DMR storage increment address and the node controller handles the local memory operations matching the DMR storage increment address.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bronson, Timothy C Round Rock, US 38 244
Drapala, Garrett M Cary, US 32 134
Fee, Michael F Cold Spring, US 41 150
Mak, Pak-Kin Poughkeepsie, US 89 1213
O'Neill, Arthur J Poughkeepsie, US 28 137
Sonnelitter,, III Robert J Wappingers Falls, US 80 378

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