Methods of forming and programming memory devices with isolation structures
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United States of America Patent
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Jun 7, 2016
Grant Date -
Jun 19, 2014
app pub date -
Feb 12, 2014
filing date -
Jun 12, 2007
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Abstract
Methods of programming and forming memory devices. Methods of programming include biasing a control gate of a selected memory cell of the memory device to a first voltage, the control gate being over a first conductive region having a first conductivity type and the first conductive region being over a second conductive region having a second conductivity type different than the first conductivity type; biasing the second conductive region to a second voltage to forward bias the junction from the second conductive region to the first conductive region; and injecting electrons into a charge-storage node of the selected memory cell from the second conductive region. The first conductive region and the second conductive region are contained within a dielectric isolation structure in which at least the selected memory cell is contained.
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Patent Owner | Address | |
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U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT | 100 WALL STREET SUITE 1600 NEW YORK NY 10005 |
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Inventor Name | Address | # of filed Patents | Total Citations |
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El-Kareh, Badih | Cedar Park, US | 56 | 896 |
Forbes, Leonard | Corvallis, US | 1219 | 61394 |
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