Semiconductor memory device
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United States of America Patent
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Jun 7, 2016
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N/A
app pub date -
Aug 26, 2014
filing date -
Mar 14, 2014
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Abstract
A semiconductor memory device includes a first memory cell, a second memory cell above the first memory cell, a first word line electrically connected to a gate of the first memory cell, a second word line electrically connected to a gate of the second memory cell, and a control unit that performs an erasing operation on the first and second memory cells. During the erasing operation, the control unit applies a first voltage to a first word line and a second voltage higher than the first voltage to a second word line.
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