Memory system and management method thereof
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United States of America Patent
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Jun 7, 2016
Grant Date -
Mar 10, 2016
app pub date -
Dec 22, 2014
filing date -
Sep 5, 2014
priority date (Note) -
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Abstract
According to one embodiment, a memory system comprises a first nonvolatile semiconductor memory, a temperature sensor and a controller. The first nonvolatile semiconductor memory includes the first and second semiconductor chips. The temperature sensor detects a temperature of the first nonvolatile semiconductor memory. The controller acquires the wear level per block of the first and second semiconductor chips based on the temperature of the first nonvolatile semiconductor memory and the frequency of use of the first nonvolatile semiconductor memory, and sets, based on the wear level, an examination frequency for defining a cycle of examination of quality of data per block of the first and second semiconductor chips.
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