Bumpless build-up layer package with pre-stacked microelectronic devices

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United States of America Patent

PATENT NO 9362253
SERIAL NO

14269318

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Abstract

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The present disclosure relates to the field of integrated circuit package design and, more particularly, to packages using a bumpless build-up layer (BBUL) designs. Embodiments of the present description relate to the field of fabricating microelectronic packages, wherein a first microelectronic device having through-silicon vias may be stacked with a second microelectronic device and used in a bumpless build-up layer package.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Malatkar, Pramod Chandler, US 50 398

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