Semiconductor apparatus including output buffer
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United States of America Patent
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Jun 7, 2016
Grant Date -
Sep 10, 2015
app pub date -
Feb 23, 2015
filing date -
Mar 5, 2014
priority date (Note) -
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Abstract
An output circuit includes first, second and third transistors. The first transistor includes first and second diffusion layers. The third transistor includes third and fourth diffusion layers. The first transistor shares the second diffusion layer with the second transistor and the third transistor shares the third diffusion layer with the second transistor. The second transistor is rendered conductive responsive to an activation of a first signal and non-conductive responsive to an inactivation of the first signal. The first and third transistors are rendered conductive responsive to an activation of a second signal that is different from the first signal and rendered non-conductive responsive to an in activation of the second signal.
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