Block aligner-based dead cycle deskew method and apparatus
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United States of America Patent
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Jun 21, 2016
Grant Date -
Oct 24, 2013
app pub date -
Dec 22, 2011
filing date -
Dec 22, 2011
priority date (Note) -
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Abstract
A method and apparatus to deskew dead cycles is described using a block aligner. In one example a method includes receiving a sequence of bytes into a first buffer from each lane of a multiple lane peripheral device bus and receiving the sequence of bytes into a second buffer delayed one clock cycle from the first buffer. The method further includes providing the sequence of bytes from the first buffer to an output buffer, counting clock cycles of data as the data is received into the first and second buffers, upon reaching a predetermined count, inserting a dead cycle into the output buffer, and after inserting the dead cycle providing the sequence of bytes from the second buffer instead of the first buffer to the output buffer.
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