Time shared protograph LDPC decoder
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United States of America Patent
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Jun 21, 2016
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N/A
app pub date -
May 15, 2014
filing date -
May 15, 2014
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Abstract
An LDPC decoder includes a check node processor. The check node processor is configured to implement an n-degree check node, where n is a predetermined number. The degree of a check node is the number of edges coupled to the check node. The LDPC decoder also includes a plurality of n time division multiplexers coupled to the check node processor to couple different edge connection input values to the check node processor at different times so as to allow the check node processor to be time division multiplexed for use in implementing different check nodes with the same check node processor. Each of the multiplexers is configured to provide no more than one edge connection input value to the check node processor at any given time. Each edge connection is used to implement an edge into a check node.
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