Apparatus and method for buffered write commands in a memory
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United States of America Patent
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Jun 28, 2016
Grant Date -
Dec 20, 2012
app pub date -
Aug 2, 2012
filing date -
Mar 24, 2009
priority date (Note) -
In Force
status (Latency Note)
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Abstract
Memories, buffered write command circuits, and methods for executing memory commands in a memory. In some embodiments, read commands that are received after write commands are executed internally prior to executing the earlier received write commands. Write commands are buffered so that the commands can be executed upon completion of the later received read command. One example of a buffered write command circuit includes a write command buffer to buffer write commands and propagate buffered write commands therethrough in response to a clock signal and further includes write command buffer logic. The write command buffer logic generates an active clock signal to propagate the buffered write commands through the write command buffer for execution, suspends the active clock signal in response to receiving a read command after the write command is received, and restarts the active clock upon completion of the later received read command.
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