Hybrid memory with associative cache

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United States of America Patent

PATENT NO 9390020
APP PUB NO 20140013025A1
SERIAL NO

13543079

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Abstract

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A hybrid memory system includes a primary memory comprising a host memory space arranged as memory sectors corresponding to host logical block addresses (host LBAs). A secondary memory is implemented as a cache for the primary host memory. A hybrid controller is configured map the clusters of host LBAs to clusters of solid state drive (SSD) LBAs. The SSD LBAs correspond to a memory space of the cache. Mapping of the host LBA clusters to the SSD LBA clusters is fully associative such that any host LBA cluster can be mapped to any SSD LBA cluster.

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Patent Owner(s)

Patent OwnerAddress
SEAGATE TECHNOLOGY LLC47488 KATO ROAD FREMONT CA 94538

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jannyavula, Venkata Sumanth Shakopee, US 20 216

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