Logic absorption techniques for programmable logic devices
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United States of America Patent
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Jul 12, 2016
Grant Date -
Dec 3, 2015
app pub date -
Oct 8, 2014
filing date -
May 30, 2014
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Abstract
Various techniques are provided to efficiently implement user designs in programmable logic devices (PLDs). In one example, a computer-implemented method includes receiving a design identifying operations to be performed by a programmable logic device (PLD). The computer-implemented method also includes synthesizing the design into a plurality of PLD components comprising a first logic block cascaded into a second logic block. In the computer-implemented method, the second logic block implements a multiplexer adapted to selectively pass a first multi-bit input signal received from the first logic block or a second multi-bit input signal. The computer-implemented method also includes further synthesizing the design to absorb the multiplexer into the first logic block.
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