Passive devices for FinFET integrated circuit technologies
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United States of America Patent
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Jul 19, 2016
Grant Date -
Dec 3, 2015
app pub date -
Aug 12, 2015
filing date -
Mar 27, 2012
priority date (Note) -
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Abstract
Device structures, design structures, and fabrication methods for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A portion of a device layer of a semiconductor-on-insulator substrate is patterned to form a device region. A well of a first conductivity type is formed in the epitaxial layer and the device region. A doped region of a second conductivity type is formed in the well and defines a junction with a portion of the well. The epitaxial layer includes an exterior sidewall spaced from an exterior sidewall of the device region. Another portion of the device layer may be patterned to form fins for fin-type field-effect transistors.
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