Semiconductor device with a vertical channel formed through a plurality of semiconductor layers

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United States of America Patent

PATENT NO 9406793
SERIAL NO

14529959

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Abstract

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Semiconductor devices and manufacturing methods are provided for making channel and gate lengths independent from lithography. Also, semiconductor devices and manufacturing methods are provided for increasing resistivity between drain and channel to allow for higher voltage operation. For example, a semiconductor device includes a first doped layer implanted in a semiconductor substrate forming one of a source or a drain and a gate metal layer disposed over the first doped layer. The semiconductor device further includes a second doped layer disposed over the gate metal forming the other the source or the drain, where the first doped layer, the gate metal layer and the second doped layer form a vertical stack of layers of the semiconductor device. The semiconductor device further includes a conduction channel formed in a trench that extends vertically through the vertical stack of layers and terminates at the semiconductor substrate.

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Patent Owner(s)

Patent OwnerAddress
AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITEDSINGAPORE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hui, Frank Irvine, US 11 76
Zhao, Sam Ziqun Irvine, US 145 3965

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