Processors, methods, systems, and instructions to consolidate unmasked elements of operation masks
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United States of America Patent
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Aug 9, 2016
Grant Date -
Sep 18, 2014
app pub date -
Mar 15, 2013
filing date -
Mar 15, 2013
priority date (Note) -
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status (Latency Note)
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Abstract
An instruction processing apparatus of an aspect includes a plurality of operation mask registers. The apparatus also includes a decode unit to receive an operation mask consolidation instruction. The operation mask consolidation instruction is to indicate a source operation mask register, of the plurality of operation mask registers, and a destination storage location. The source operation mask register is to include a source operation mask that is to include a plurality of masked elements that are to be disposed within a plurality of unmasked elements. An execution unit is coupled with the decode unit. The execution unit, in response to the operation mask consolidation instruction, is to store a consolidated operation mask in the destination storage location. The consolidated operation mask is to include the unmasked elements from the source operation mask consolidated together. Other apparatus, methods, systems, and instructions are also disclosed.
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