Interference suppression method and apparatus
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United States of America Patent
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Aug 9, 2016
Grant Date -
Dec 11, 2014
app pub date -
Jun 5, 2014
filing date -
Jun 8, 2013
priority date (Note) -
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Abstract
Embodiments of the present invention provide an interference suppression method and apparatus, which can eliminate interference of a digital circuit with an analog circuit. The method includes: receiving a system clock, where a current frequency of the system clock is a first frequency; and converting the system clock into an optimal clock of a current sensitive frequency band, where the optimal clock and high-order harmonics of the optimal clock do not fall within a receive band of the sensitive frequency band, where the optimal clock is selected, with reference to the sensitive frequency band, from the system clock and at least one planned clock which is determined according to the first frequency, a frequency of the at least one planned clock is a second frequency, and a frequency increment of the second frequency relative to the first frequency is less than or equal to a preset threshold.
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