Semiconductor memory device
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United States of America Patent
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Aug 16, 2016
Grant Date -
Mar 17, 2016
app pub date -
Feb 24, 2015
filing date -
Sep 12, 2014
priority date (Note) -
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Abstract
A semiconductor memory device includes a memory cell, a bit line electrically connected to a first end of the memory cell, a source line electrically connected to a second end of the memory cell, a sense amplifier electrically connected to the bit line, and a controller configured to perform a read operation including first and second read operations on the memory cell. During the first read operation, a pre-charge voltage is applied to the bit line and a source line voltage lower than the pre-charge voltage is applied to the source line, and during the second read operation, a first voltage that is greater than the source line voltage and less than the pre-charge voltage is applied to the bit line.
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