Optimized flash memory without dedicated parity area and with reduced array size

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United States of America Patent

PATENT NO 9424178
APP PUB NO 20140013033A1
SERIAL NO

13806007

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Abstract

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A method and system for optimizing flash memory without dedicated parity area and with reduced array size. The memory size of a multi level cell (MLC) flash is reduced and controller operation is simplified. Simplified operation includes the controller being able to program each host data page to an integer number of flash pages. A maximal available information bits per cell (IBPC) is maintained in a flash device while also maximizing the programming throughput of the flash. Features include the ability to dynamically select which number of cell states is used by flash memory cells.

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Patent Owner(s)

  • SANDISK IL LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Alrod, Idan Herzliya, IL 242 7155
Litsyn, Simon Giv'at Shmuel, IL 72 3222
Sharon, Eran Rishon Lezion, IL 322 8326

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