Gate driving circuit and array substrate
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United States of America Patent
Stats
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Aug 23, 2016
Grant Date -
Jan 8, 2015
app pub date -
Jul 5, 2013
filing date -
Apr 25, 2013
priority date (Note) -
In Force
status (Latency Note)
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Abstract
Disclosed are a gate driving circuit and an array substrate relating to the field of display technique and capable of ensuring that, when there is a malfunction such as a short-circuit and the like among input paths of clock signals for a certain gate driving unit, other gate driving units can operate properly. The gate driving circuit includes a plurality of sets of gate driving units, each set of gate driving units includes m gate driving units, and m is an integer greater than 1; each set of gate driving units outputs a gate driving signal to a gate line; when one gate driving unit in a set of gate driving units malfunctions, said gate driving unit in malfunction is terminated in operation and other gate driving units in the set of gate driving units maintain an operation of the set of gate driving units.
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