Methods of forming semiconductor structures including tight pitch contacts and lines
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United States of America Patent
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Sep 6, 2016
Grant Date -
Jul 9, 2015
app pub date -
Mar 19, 2015
filing date -
Aug 3, 2007
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Abstract
Methods of fabricating semiconductor structures incorporating tight pitch contacts aligned with active area features and of simultaneously fabricating self-aligned tight pitch contacts and conductive lines using various techniques for defining patterns having sublithographic dimensions. Semiconductor structures having tight pitch contacts aligned with active area features and, optionally, aligned conductive lines are also disclosed, as are semiconductor structures with tight pitch contact holes and aligned trenches for conductive lines.
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