Ferroelectric-enhanced tuning of ring resonators by using fields parallel to and above a top surface thereof
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United States of America Patent
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Sep 13, 2016
Grant Date -
Feb 18, 2016
app pub date -
Aug 12, 2014
filing date -
Aug 12, 2014
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Abstract
An integrated circuit is described. This integrated circuit includes a ferroelectric layer disposed on top of the ring resonator, which has a resonance wavelength. The ferroelectric layer is positioned between electrical contacts. Moreover, there may be amorphous semiconductor materials between the electrical contacts and the ferroelectric layer. For example, the amorphous semiconductor materials may include: p-type amorphous silicon and/or n-type amorphous silicon. By applying a reverse-bias voltage across the electrical contacts, an electric field is generated in a plane approximately parallel to a top surface of the ring resonator. This electric field electro-optically tunes the resonance wavelength. The ring resonator may operate at low voltage and can be integrated with a silicon optical waveguide on a silicon-on-insulator (SOI) platform.
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