Using a decrementer interrupt to start long-running hardware operations before the end of a shared processor dispatch cycle
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United States of America Patent
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Sep 20, 2016
Grant Date -
Jan 28, 2016
app pub date -
Sep 30, 2014
filing date -
Jul 28, 2014
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Abstract
Method to perform an operation, the operation comprising processing a first logical partition on a shared processor for the duration of a dispatch cycle, issuing, by a hypervisor, at a predefined time prior to completion of the dispatch cycle, a lightweight hypervisor decrementer (HDEC) interrupt specifying a cache line address buffer location in a virtual processor, and responsive to the lightweight HDEC, writing, by the shared processor, a set of cache line addresses used by the first logical partition to the cache line address buffer location in the virtual processor.
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