Method of forming superjunction high voltage devices using wafer bonding
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 4, 2016
Grant Date -
Sep 15, 2016
app pub date -
Jun 26, 2015
filing date -
Jun 26, 2014
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method of forming a superjunction device includes providing a semiconductor layer having first and second opposing main surfaces and a first doping concentration of a dopant of a first conductivity type, forming at least one device proximate the first main surface, forming at least one trench adjacent to the device and extending into the semiconductor layer from the first main surface, doping at least a portion of a sidewall of the trench with a dopant of a second, different conductivity type to form a first region in the semiconductor layer adjacent to the sidewall and extending at least partially between the first and second main surfaces, providing a substrate with a first dielectric layer arranged thereon, bonding the first dielectric layer to the first main surface to cover the trench and at least a portion of the device, and removing the substrate.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully