Transistors with source and word line voltage adjusting circuitry for controlling leakage currents and its method thereof
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 11, 2016
Grant Date -
Mar 10, 2016
app pub date -
Jan 9, 2015
filing date -
Sep 4, 2014
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
According to one embodiment, a semiconductor memory device includes a source voltage adjustment circuit and a word line voltage adjustment circuit, which are configured to respectively supply a source voltage supply end and a word line switchingly with voltage-adjusted voltages, in response to a mode switching signal for switching between a retention state mode and an active state mode, wherein the source voltage supply end is connected to sources of MOS transistors forming a flip-flop of a memory cell, and the word line is connected to gates of access transistors.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully