Memory hierarchy using row-based compression

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United States of America Patent

PATENT NO 9477605
APP PUB NO 20150019813A1
SERIAL NO

13939377

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Abstract

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A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.

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Patent Owner(s)

  • ADVANCED MICRO DEVICES, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Loh, Gabriel H Bellevue, US 129 1872
O'Connor, James M Austin, US 134 3213

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