Noise mitigation for write precompensation tuning

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United States of America Patent

PATENT NO 9495987
APP PUB NO 20160322074A1
SERIAL NO

14701914

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Abstract

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The disclosed technology provides techniques for mitigating write-to-write bit error rate fluctuations that decrease accuracy of write precompensation (WPC) tuning. According to one implementation, such write-to-write bit error rate fluctuations are mitigated if a predetermined pattern is written at a particular radial offset from a target data track prior to testing a WPC register in association with the target data track. Selection of the particular radial offset can be performed according to an iterative offset track clean-up disclosed herein.

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Patent Owner(s)

  • SEAGATE TECHNOLOGY LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chong, Fong Kheon Singapore, SG 5 58
Choo, Quek Leong Singapore, SG 12 264
Niu, Ben Singapore, SG 29 263
Teo, Song Wee Singapore, SG 11 97
Xia, Lan Singapore, SG 6 20

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