CMOS analog memories utilizing ferroelectric capacitors
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United States of America Patent
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Nov 15, 2016
Grant Date -
Jul 7, 2016
app pub date -
Mar 16, 2016
filing date -
Nov 30, 2010
priority date (Note) -
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Abstract
A memory cell and memories constructed from that memory cell are disclosed. A memory according to the present invention includes a ferroelectric capacitor, a charge source and a read circuit. The charge source receives a data value to be stored in the ferroelectric capacitor. The charge source converts the data value to a remanent charge to be stored in the ferroelectric capacitor and causes that remanent charge to be stored in the ferroelectric capacitor. The read circuit determines a charge stored in the ferroelectric capacitor. The data value has more than three distinct possible states, and the determined charge has more than three determined values. The memory also includes a reset circuit that causes the ferroelectric capacitor to enter a predetermined known reference state of polarization.
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