Method for forming interconnection structures

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United States of America Patent

PATENT NO 9496172
SERIAL NO

14647706

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Abstract

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The present invention provides a method for forming interconnection structures, including the following steps: providing a semiconductor wafer with a dielectric layer; forming a first recessed area for forming the interconnection structures and a non-recessed area on the dielectric layer; forming a second recessed area for forming dummy structures on the dielectric layer; depositing a barrier layer to cover the first and second recessed areas and the non-recessed area; depositing a metal layer to fill the first and second recessed areas and cover the non-recessed area; removing the metal layer on the non-recessed area to expose the barrier layer; and removing the barrier layer on the non-recessed area to expose the dielectric layer.

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Patent Owner(s)

Patent OwnerAddress
ACM RESEARCH (SHANGHAI) INCBUILDING 4 NO 1690 CAI LUN ROAD CHINA (SHANGHAI) PILOT FREE TRADE ZONE PUDONG NEW AREA SHANGHAI 201203 201203

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jia, Zhaowei Shanghai, CN 38 48
Wang, Hui Shanghai, CN 1115 8921
Wang, Jian Shanghai, CN 1906 17240

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