Interposer for integrated circuit chip package

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United States of America Patent

PATENT NO 9496248
APP PUB NO 20150194413A1
SERIAL NO

14148557

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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An interposer for an electronic circuit chip package may include a substrate, a recess, first conductive vias, and second conductive vias. The substrate may have a first surface, a second surface substantially parallel to and opposite the first surface, a third surface substantially parallel to the first surface and the second surface, and an orthogonal surface that is substantially orthogonal to and intersects the first surface and the third surface. The recess may be formed in the substrate and defined by the third surface and the orthogonal surface. The first conductive vias may pass from the second surface to the first surface. The second conductive vias may pass from the second surface to the third surface.

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First Claim

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Patent Owner(s)

  • FUJITSU LIMITED

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lee, Michael Saratoga, US 301 17093
Yamamoto, Takuji San Jose, US 49 710

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