Maintaining processor resources during architectural events

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United States of America Patent

PATENT NO 9507730
SERIAL NO

14858835

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Abstract

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In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Brandt, Jason W Austin, US 156 1324
George, Robert T Austin, US 23 482
Mondal, Sanjoy K Austin, US 26 225
Neiger, Gilbert Hillsboro, US 289 7037
Uhlig, Richard A Hillsboro, US 60 1272

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