Method and structure for forming gate contact above active area with trench silicide
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United States of America Patent
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Nov 29, 2016
Grant Date -
N/A
app pub date -
Dec 14, 2015
filing date -
Nov 2, 2015
priority date (Note) -
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status (Latency Note)
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Abstract
A semiconductor device includes a substrate including an active area; a gate formed on the active area and surrounded by a spacer along a sidewall; a first source/drain contact and a second source/drain contact positioned on opposing sides of the gate and in contact with the active area; a first recess formed in the first source/drain contact and a second recess formed in the second source/drain contact; a gate contact including a conductive material on and in contact with the gate and the spacer; and an insulating liner disposed along a sidewall of the gate contact and in the first recess in the first source/drain contact and the second recess in the second source/drain contact.
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