Apparatuses and methods for coupling semiconductor devices of a memory module in a memory system
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United States of America Patent
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Dec 20, 2016
Grant Date -
Aug 21, 2014
app pub date -
Jan 31, 2014
filing date -
Feb 18, 2013
priority date (Note) -
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status (Latency Note)
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Abstract
A system includes memory chips mounted on a memory module each having an alert terminal that notifies that the memory chip has detected a predetermined error. The memory module has a first transmission line connected to alert terminals of memory chips, output terminal being connected to one end of the first transmission line, and a first termination resistor having an end connected to another end of the first transmission line. The system further includes a second transmission line having an end connected to the alert terminal and another end connected to a controller and a third transmission line having an end connected to a first input terminal on the memory module and a second end line and a second end having a voltage different from a voltage of another end of the first termination resistor.
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