Semiconductor memory device including a repeater circuit on main data lines
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United States of America Patent
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Dec 27, 2016
Grant Date -
Apr 30, 2015
app pub date -
Oct 24, 2014
filing date -
Oct 25, 2013
priority date (Note) -
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Abstract
A semiconductor memory disclosed in this disclosure includes first and second memory cell arrays, a first main data line that transfers the read data read from the first memory cell array, a second main data line that transfers the read data read from the second memory cell array, a main amplifier coupled to the second main data line, and a repeater circuit coupled to the first main data line and the second main data line.
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