Reduction of power consumption in memory devices during refresh modes
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United States of America Patent
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Jan 3, 2017
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N/A
app pub date -
Jun 13, 2016
filing date -
Mar 27, 2012
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Abstract
Devices, systems, and methods include an active mode to accommodate read/write operations of a memory device and a self-refresh mode to accommodate recharging of voltage levels representing stored data when read/write operations are idle. At least one register source provides a first voltage level and a second voltage level that is less than the first voltage level. With such a configuration, during the active mode, the memory device operates at the first voltage level as provided by the at least one register source, and during the self-refresh mode, the memory device operates at the second voltage level as provided by the at least one register source.
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