L2 flush and memory fabric teardown

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United States of America Patent

PATENT NO 9541984
APP PUB NO 20140365798A1
SERIAL NO

13910584

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Abstract

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A system and a method which include one or more processors, a memory coupled to at least one of the processors, a communication link coupled to the memory, and a power management unit. The power management unit may be configured to detect an inactive state of at least one of the processors. The power management unit may be configured to disable the communication link at a time after the processor enters the inactive state, and disable the memory at another time after the processor enters the inactive state.

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Patent Owner(s)

Patent OwnerAddress
APPLE INC1 INFINITE LOOP CUPERTINO CA 95014

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kassoff, Jason M Denver, US 13 174
Lien, Wei-Han San Jose, US 36 435
Wen, Shih-Chieh R San Jose, US 8 92

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