Nonvolatile semiconductor memory device
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United States of America Patent
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Jan 10, 2017
Grant Date -
Oct 10, 2013
app pub date -
Mar 6, 2013
filing date -
Mar 26, 2012
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Abstract
A nonvolatile semiconductor memory device includes an array of memory cells arranged at the position intersecting positions of the word line and the bit line, a control signal generating circuit for carrying out a writing operation including a program for carrying out writing in the memory cell and a verification for verifying whether the data has been correctly written in the memory cell by the program, and a cell source monitoring circuit for detecting a voltage of the source line connected to the memory cell during the writing operation. The control signal generating circuit directly shifts the source line voltage at the time of program to a lower voltage necessary at the time of verification after the end of the program, based on the voltage the source line detected by the cell source monitoring circuit.
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