Dimension calculation method for a semiconductor device

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United States of America Patent

PATENT NO 9558565
APP PUB NO 20150228065A1
SERIAL NO

14175278

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Abstract

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An automatic calculation method for thickness calculation of a deposition layer in a Fin-type field-effect transistor (FinFET) is disclosed through mapping edge lines onto an Excel spreadsheet. The similar method is also applied to the thickness calculation of superlattice or multiple quantum well for a light emitting diode (LED). The edge lines are obtained and transformed from an electronic image taken by Transmission Electron Microscopy (TEM), Focus Ion Beam (FIB), Atomic Force Microscopy (AFM), or X-Ray Diffraction (XRD) of the device.

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Patent Owner(s)

Patent OwnerAddress
MATERIALS ANALYSIS TECHNOLOGY INC1F NO 26-2 TAIYUAN ST ZHUBEI CITY HSINCHU COUNTY 302

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Biring, Sajal Hsinchu, TW 6 12

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