High voltage metal oxide semiconductor field effect transistor integrated into extremely thin semiconductor on insulator process
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United States of America Patent
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Jan 31, 2017
Grant Date -
Mar 31, 2016
app pub date -
Dec 3, 2015
filing date -
Apr 11, 2014
priority date (Note) -
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Abstract
An electrical device including a first semiconductor device in a first region of the SOI substrate and a second semiconductor device is present in a second region of the SOI substrate. The first semiconductor device comprises a first source and drain region that is present in the SOI layer of the SOI substrate, raised source and drain regions on the first source and drain regions, and a first gate structure on a channel region portion of the SOI layer. The second semiconductor device comprises a second source and drain region present in a base semiconductor layer of the SOI substrate and a second gate structure, wherein a gate dielectric of the second gate structure is provided by a buried dielectric layer of the SOI substrate and a gate conductor of the second gate structure comprises a same material as the raised source and drain region.
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