Active probe pod in logic analyzer
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United States of America Patent
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Feb 7, 2017
Grant Date -
Jul 2, 2015
app pub date -
Dec 18, 2014
filing date -
Dec 26, 2013
priority date (Note) -
In Force
status (Latency Note)
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Abstract
An active probe pod used in a logic analyzer is disclosed. The active probe pod may be connected to the logic analyzer having a FPGA decoder and to a DUT circuit board. The active probe pod may include a LVDS differential ire component connected to the FPGA decoder and a front-end circuit board for capturing a weak signal input from the DUT circuit board. The front-end circuit board is adapted not to transmit the captured weak signal input over a long-distance signal transmission path, which helps minimize interferences with the weak signal input, while outputting a LVDS differential signal to the FPGA decoder for decoding. As the front-end circuit board is used for capturing the weak signal input, which falls within the category of one short-distance signal transmission, the signal reflection may not take place, without affecting the signal quality and/or attenuating the signal strength.
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